1. Field of the Invention
The present invention relates to a multilayer filter including a plurality of stacked dielectric layers on each of which a predetermined electrode pattern is provided, and more particularly to a multilayer filter including balanced output terminals.
2. Description of the Related Art
Previously, various types of multilayer circuit elements have been proposed in which predetermined circuit functions are realized by stacking a plurality of dielectric layers on each of which a predetermined electrode pattern is formed. As one of those multilayer circuit elements, there is a multilayer filter for realizing a filter function. Further, there is a multilayer filter having an unbalanced-balanced transforming function (hereinafter referred to as a “multilayer balance filter”) as disclosed in Japanese Unexamined Patent Application Publication No. 2006-229464.
In the related-art multilayer balance filter, as disclosed in Japanese Unexamined Patent Application Publication No. 2006-229464, two balanced output terminals arranged in a pair are each connected to a ground through a capacitor.
However, when that type of multilayer balance filter is mounted to a mother board, a phase reference for a signal may often be deviated from a desired value depending on the specifications of ground wiring patterns on the mother board and the mounted state of the multilayer balance filter to the mother board (such as a difference in amount of a solder for each mounting electrode). This makes it difficult to obtain a stable balance characteristic between the two balanced terminals.